Sigasi Extension for Visual Studio Code

What are the most annoying or time-consuming parts of writing VHDL, Verilog, and SystemVerilog? Surely it’s the verification/editing/checking/linting. How frustrating is it to have to go back and rework code after the fact? Time you could be spending moving forward in your project, rather than reworking for errors.

Sigasi has an extension for that! Originally developed for Eclipse, Sigasi realized that its solutions are the perfect fit for VS Code users, too – especially given that the Microsoft-created code editor is rapidly becoming  the most popular IDE.

In December, we’re releasing the first full version of our VS Code extension. Let’s take a look inside:

Upfront verification

Our extension gives you instant feedback in real time. No waiting for a full linting process first, no having to run a full check before you get alerts about possible errors or issues. We verify your code upfront,  as you type it.

Powerful features

From basic editing features like block selection and syntax highlights to advanced features like autocompletes, code navigation, and linting, we’re here to fully support you as you design. Crucially, Sigasi understands semantics as well as syntax: our extension provides deep analysis & reference understanding for your code. In other words, it’s much smarter than just word search.

One and Done

One time download. No multiple set-up steps, no extra packages. Updates automatically, seamlessly. In fact, you can use our VS Code extension along with the license and Sigasi set-up you already have for other projects. It’s all about seamless integration here.

We’ve got your back

Our team of engineers has been working on Sigasi’s solutions for HDL designers for 14 years. We offer support for any questions or issues you may come up against as you work. Our team is also constantly working on improvements, bug fixes, and updates, so you can be assured you’ve always got the most up-to-date and helpful tool possible.

Polyglot capabilities

Whether you’re using VHDL, Verilog, SystemVerilog, or even a mix of these, the Sigasi extension has you covered. We know the languages deeply: Sigasi works with them, not despite them.

Importantly, VS Code users are getting the full Sigasi experience. VS Code is portable, but our extension has all the bells and whistles of our full Sigasi Studio. What’s more, we’re fully integrated into the broad VS Code ecosystem. The IDE has lots of extensions that let you customize your experience just the way you like it. We get it, and our extension plays nice with all those other options.

Some specific features (for the engineers in the audience):

• Code Completion: Our powerful language server will offer smart suggestions for your HDL code as you type or by pressing Ctrl+Space. Some of these suggestions include entity and component instantiations for VHDL and file browsing for including macros in SystemVerilog.
• Code Formatting: Format your code to keep it clean and consistent. We worry about how it looks, so you can focus on designing.
• Find References: Find where an identifier is being used, anywhere in your design.
• Hierarchy View: Select your top level and browse your design’s hierarchy. Note that this view requires a manual refresh.
• Hovers: Just hover your mouse over an identifier to see useful information about every part of your HDL design. For SystemVerilog macros, you can even see the expanded code.
• Mark Occurrences: Click on an identifier to highlight all of its usages in the current file.
• Navigation: Navigating through your complex design was never this easy. Just Ctrl+Click any identifier and we will take you to the place it was declared.
• Outline: In the outline, you can see everything that’s defined in your file in a very compact way. Click one of the items to jump to it in your file. You can also enable ‘Follow Cursor’ so that the outline view follows your cursor in the editor.
• Preprocessor View for SystemVerilog: Here you see a fully expanded (preprocessed) SystemVerilog file.
• Rename: Rename allows you to change the name of an identifier across your whole design. This is perfect if you want to change the name of a signal in all places.

Sigasi’s VS Code extension is part of our wider IDE ecosystem, which is getting an upgrade as 2022 comes to a close:

• Our Sigasi Studio, tried and trusted in the Eclipse community, will have an exciting revamp with a new 5.0 release.
• We’re also introducing our new Veresta tool, a sort of “gatekeeper” for committing code to a master repository. Your entire team, regardless of the EDA they use or the language they’re speaking will be able to double-check that warnings and errors have been dealt with, check permissions, project management, and more to make sure the whole project is working as it should.

Your main goal is to design as efficiently as possible, right? That’s what Sigasi is all about.
With our VS Code extension, that’s what you’ll be doing while coding in the most popular editor on the market today.

How to get started with Sigasi:

• Please contact support+vscode@sigasi.com with any issues or questions that aren’t answered in the documentation you’ll find at sigasi.com/vscode.
• The VS Code extension uses the same license as Sigasi Studio. VS Code users can download Sigasi from the Visual Studio marketplace to get powerful developer support while working with Verilog, VHDL, and SystemVerilog.
• You can use your existing Sigasi Studio license or get a free trial license from https://www.sigasi.com/try/.