IBM showcases high-NA patterning benchmarks

Using ASML’s high-NA EUV scanner in the Veldhoven High-NA Lab, IBM Research has released an early demonstration of metallization of lines down to 21nm pitch. This result unlocks sub-2nm chips by enabling the continuation of copper damascene interconnect integration and simplifying the needs of nanosheet technology, Big Blue’s research arm says. While the single-print 24, 23 and 21nm pitch ‘high-NA’ interconnects have demonstrable and consistent electrical functionality, the race is now on to improve yield. In this respect, IBM has set a benchmark of sorts, a reference point on the base of which progress can be measured.