TSMC rumored to delay high-NA adoption until 1nm node

TSMC may postpone the introduction of high-NA EUV tools into high-volume manufacturing until 2029. Sources told Digitimes that the Taiwanese foundry is unlikely to use the next generation of EUV technology before the A10 (1nm) node, therefore skipping the 2nm and A14/1nm node.

The report fits with rumors first uttered in December that TSMC was in no hurry to adopt high-NA EUV due to poor cost performance compared to double patterning with 0.33-NA EUV. ASML is confident that high-NA is the most cost-effective solution, whereas TSMC’s management has been silent on the matter.

Intel has recently received the first cargo container of high-NA components for the pre-production EXE:5000 tool and is reported to get another six EXE:5200 production tools this year. With an estimated total shipment of ten high-NA systems in 2024, that leaves one for Samsung and two for TSMC or vice versa. It stands to reason all three leading-edge chipmakers will get at least one tool for process development.

Samsung hasn’t revealed its roadmap for high-NA adoption.