Nieke Roos
18 February 2022

Researchers at Imec and KU Leuven have designed the first-ever chip that combines a digital and analog coprocessor to accelerate computations for artificial intelligence. The Digital and Analog Accelerator (Diana) automatically performs different types of calculations in the most energy-efficient way. It can be used to allow robots to efficiently determine the objects in their field of view and how to grab them.

More and more systems interact with their surroundings. For privacy reasons, the processing of environmental images, sounds and other data is best done on the devices themselves. Unfortunately, this requires a lot of computing power, which can quickly drain the battery. Today, some vehicles and smartphones are already equipped with a digital processor specifically designed to speed up calculations. However, to enable high-performance augmented-reality glasses, an autonomous drone or a smart robot, a new generation of AI chips is needed that’s much more energy efficient.

Imec Diana on PCB
The hybrid Diana chip, mounted on a PCB.

Two years ago, Imec developed a new chip architecture in which calculations are performed directly in computer memory through analog technology. This analog accelerator makes it possible to perform most of the operations ten to one hundred times more energy efficient than in a digital accelerator. For other operations, the calculation precision and programmability of a digital accelerator are better suited.

Diana, manufactured by Globalfoundries, offers the best of both worlds. The hybrid chip automatically performs the operations on the coprocessor best suited for each specific task. It thus combines the advantages of an analog accelerator (processing speed and energy efficiency) with the broad applicability of a digital one. This opens up a range of new applications, which will be further investigated within the Flemish AI Research Program. For example, a robotic arm is being developed that can automatically recognize and grab objects. The calculations required for image recognition and robot control can be carried out energy efficiently on the same chip.

ASML special

“The rapidly increasing heterogeneity in AI algorithms requires new hardware that can perform the different types of computations performantly and energy efficiently,” says Marian Verhelst, research director at Imec and professor of microelectronics at KU Leuven. “For some applications, such as pattern recognition, an analog coprocessor is best suited. Other applications, such as reasoning about those observations, additionally require a digital coprocessor. The solution we now propose combines the best of both worlds on one compact chip and always performs calculations in the most energy-efficient way, independent of the specific application.”