At this year’s SPIE Advanced Lithography Conference, Imec presented “significant progress in preparing the high-NA patterning ecosystem.” In 12 papers, advances are reported in developing patterning and etch processes, screening new resist and underlayer materials, improving metrology and photomask technology.
“Imec is partnering with ASML on high-NA technology as ASML is building its first prototype 0.55NA EUV lithography scanner EXE:5000. It’s Imec’s role, in tight collaboration with the global patterning ecosystem, to ensure timely availability of advanced resist materials, photomasks, metrology techniques, imaging strategies and patterning techniques – to fully benefit from the resolution gain offered by the high-NA EUV lithography scanner,” comments Imec CEO Luc Van den hove.
In anticipation of the first high-NA EUV prototyping system, Imec is pushing the resolution capability of current 0.33NA EUV patterning technologies to predict the performance of thinner resists for printing fine line/spaces and contact holes. In addition to pattern collapse, the institute identifies line-edge roughness (LER) as one of the most critical parameters for patterning lines/spaces with thin resist films, and proposes tuning illumination and mask conditions to mitigate pattern roughness.
In addition, Imec and its material suppliers present the results of screening new resist materials, such as metal oxides, and underlayers with promising pattern transfer capabilities under high-NA conditions. They also propose dedicated patterning and etch schemes aimed at reducing defectivity and stochastic printing failures.
Imec is also zooming in on challenges surrounding the metrology of smaller feature sizes and thinner resist films. “We’re taking several directions to address these challenges. They show that image contrast can be significantly improved by tweaking the operation conditions of existing metrology tools. Image analysis and defect classification are further enhanced by dedicated software, supported by deep-learning frameworks, such as deep learning-based de-noising,” says Imec’s program director Advanced Patterning Kurt Ronse.
Finally, Imec has simulated the impact of EUV mask deficiencies upon imaging 22-nm pitch lines/spaces. “From this study, it becomes clear that mask imperfections are increasingly impacting the final wafer pattern, indicating that mask design rules need to become tighter,” adds Ronse. “These findings allow us to identify mask specifications for high-NA EUV lithography. In addition, together with ASML and our material suppliers, we explore novel materials and architectures for the mask absorber, which carries the pattern.”