Paul van Gerven
15 May

In a move intended to take the lead in process technology, Samsung plans to start risk production of 3nm ICs as early as the second half of next year. These chips will be the first to feature gate-all-around (GAA) transistors. According to Samsung, this next step in transistor technology offers a 45 percent reduction in chip area, a 50 percent lower power consumption and/or a 35 percent better performance compared to its 7nm process, which went to volume production earlier this year.

Originally, a transistor channel was a 2D structure with a gate perched atop to control the flow of current. Since the early 2010s, advanced CMOS uses channels raised into 3D fin structures, called FinFETs. The GAA takes it one step further by wrapping the gate around the channel completely. This, among other things, reduces off-state leakage current.

Evolution of the FET. Credit: Samsung

Samsung developed its own version of GAA, called Multi-Bridge Channel Field Effect Transistors (MBCFET). A typical GAA transistor uses nanowires as channels, but the MBCFET uses nanosheets. The increased channel area serves to increase maximum current levels.

TSMC will migrate to GAA as well, but the foundry hasn’t announced a timetable. “Samsung is ahead of TSMC in GAA by probably 12 months,” said Handel Jones of the consulting firm International Business Strategies. “Intel is probably two to three years behind Samsung.”

Dutch System Architecting Conference