ASM played a key role in developing a deposition technique that has saved Moore’s law more than once. Outgoing CTO Ivo Raaijmakers explains what atomic layer deposition has brought the semiconductor industry – and ASM – and what more is in store.
ASM has grown spectacularly. At the beginning of this century, the equipment maker – then based in Bilthoven, now in Almere – was worth less than a billion euros. After a growth spurt in recent years, it’s now nearly 14 billion. A year ago, before tech stocks fell into disrepute, the company’s market capitalization even ticked up to 24 billion. In the same period, sales grew from half a billion euros to an expected 2.5 billion this year.
This makes ASM Europe’s second-largest supplier of semiconductor equipment. And at least as important to the industry as number one, ASML. We sometimes forget in the Netherlands, but the global deposition market is about the same size as the lithography market – it’s just a lot more crowded. Moreover, deposition has grown faster than lithography over the past decade.
ASM’s success is the result of bold choices that the company has steadfastly stuck to for years, even when some shareholders didn’t want to play ball. Claiming ASM’s front-end activities were holding back ASM Pacific Technology, which focuses on back-end equipment, activist investors pushed for splitting up the company in 2008-2012. In a, by Dutch standards, unusually fierce legal battle, the Supreme Court finally allowed ASM’s management to put its vision into practice.
Ivo Raaijmakers was there from the very beginning. He became CTO the day ASM took the first step towards starting a deposition revolution in the semiconductor industry by acquiring the Finnish company Microchemistry in 1999, and he never for a moment doubted the path the company had taken. “Of course, there have been internal discussions about whether we’d backed the right horse, but I’ve always believed in it. I believed in the application we had in mind at the time, and was confident that many more applications would follow,” Raaijmakers says at ASM’s headquarters in Almere.
This vision has come true. The technique that ASM acquired through Microchemistry – atomic layer deposition (ALD) – has become an integral part of the semiconductor manufacturing process. And that’s just the beginning, according to Raaijmakers. The demands placed on material layers are ever higher – thinner, more uniform, featuring just the right properties – and ALD is the best technique to meet them, the former CTO argues.
Former, because Raaijmakers stepped down in early 2022. After 22 years, he handed over his leadership role at ASM to Hichem M’Saad, although he’ll stay on as an advisor. Together with Bits&Chips, Raaijmakers looks back as well as ahead.
When ASM bought Microchemistry, the natural oxide of silicon was on its last legs as an insulating layer between the gate electrode and the transistor channel. This layer of silicon oxide had to be made thinner and thinner to increase the gate capacitance, but, as a result, it started to leak more and more current. The search for a successor was on, one that would allow increased gate capacitance at modest layer thickness. Because ALD excels at very controlled layer growth, this technique seemed ideally suited for depositing nanofilms of these so-called high-k materials.
ALD is self-limiting: the chemical reaction between vapor and substrate ceases once the surface is completely covered. At the end of one process cycle, exactly one atomic layer has been deposited. By repeating the process, as many more layers as desired can be built up. Since such precision in layer thickness is impossible to obtain with related techniques, ALD is the only option when the required layer thickness drops below a critical lower limit, as is the case for high-k materials.
Intel demonstrated the first processors featuring ALD layers in 2007 and brought them to market in 2009. It’s a public secret – Raaijmakers doesn’t name names – that the then-market leader worked closely with ASM for years to make that happen. Raaijmakers does express pride that his company participated “in the biggest change in CMOS manufacturing in forty years.”
It proved to be a springboard for success, not only because ASM gained tremendous credibility working with Intel but also because establishing intimate ties with customers has become a core element of ASM’s philosophy. “ASM’s collaborations with customers start at an earlier stage than those of our industry peers and we work together more closely,” Raaijmakers says.
“I think that explains why we’re more efficient: collaboration eliminates risk. We’re quicker to discover what our customers need and they can take note of our exploratory research projects. The sooner we know which solutions will pan out and which ones won’t, the more effectively we can use our R&D resources. In 22 years as CTO, I’ve seen the intensity with which equipment makers and their customers work together increase, and I expect that trend to continue.”
Well before ALD had proven itself in the deposition of high-k materials, Raaijmakers was already looking at which applications would follow. On his initiative, ASM acquired Korean company Genitech in 2004, a specialist in plasma-enhanced ALD technology (PEALD). Plasmas are more reactive than un-ionized gases and therefore can deposit materials at lower temperatures. Because chipmakers often have to deal with strict temperature budgets, PEALD expands the scope of ALD.
The purchase proved a major boon, partly thanks to delays in the industrialization of EUV lithography, resulting in chipmakers having to pattern their most difficult layers in two steps. This can be done ‘classically’ with two lithography steps or using so-called space-defined double patterning (SDDP). In the latter option, one lithography step and additional deposition and etching steps convert a single line into two lines, separated by a distance that was impossible to realize with the lithographic tools available.
“For SDDP, silicon oxide must be deposited at low temperature in such a way that the material follows contours very closely,” says Raaijmakers. Good conformality – ie uniform layer thickness regardless of surface topology, whether on horizontal or vertical surfaces, on top of protrusions or at the bottom of troughs – is something (PE)ALD excels at.
And so, after the deposition of high-k materials, ALD was also introduced in patterning. SDDP is particularly well-suited for very regular chip structures, which are more commonly found in memory chips. In that sector, despite the availability of EUV lithography, it’s still widely in use because of its cost-effectiveness.
Raaijmakers considers the acquisition of Genitech a highlight of his career. “The acquisition led to a large new site in South Korea, where we do both R&D and manufacturing. That has increased business for ASM in Korea. And that, in turn, has yielded us market leadership in ALD.” ASM currently claims 55 percent of the ALD market and a similar percentage in the PEALD arena.
Next big thing
Next, in the early years of the previous decade, ALD starred in the introduction of the FinFET, the transistor type in which the channel protrudes from the wafer like a shark fin. The gate folds around it on three sides to better pinch off the current. This was much needed, as traditional planar transistors were beginning to leak too much, despite high-k materials. “Without ALD, FinFETs wouldn’t have been possible,” says Raaijmakers. Only ALD is covering the fin structure evenly.
This summer, Samsung switched to the FinFET’s successor, the gate-all-around (GAA) transistor in which the fin is turned on its side, allowing for the gate to completely envelop the channel. Each transistor has multiple channels, usually three.
These kinds of complex structures are a gold mine for manufacturers of ALD tools, Raaijmakers explains. “The fins are separated by only ten nanometers. In that space, you have to deposit a high-k material, a gate metal and a metal that defines the work function of the transistor. That’s four or five different materials in such a thin layer. ALD is perfect for that.”
In memories, too, ever-thinner and more complex layer structures need to be deposited to keep storing more bits per dollar. High-k materials have already found their way into the control electronics in DRAM because the memory cells themselves barely scale anymore. That’s a one-time improvement, however, not a strategy that allows for increasingly small structures.
“The fundamental problem is that the capacitor no longer scales. This leaves only one option: go 3D, just as has happened in NAND flash. Stacking layers on top of each other is the only way to continue reducing the cost per bit. According to current expectations, 3D DRAM will be able to compete with regular DRAM around 2026.”
Raaijmakers could go on for hours about more innovations in the pipeline. Long story short: as long as the number of deposition layers per chip increases, and those layers need to become thinner and more complex in composition, ASM’s business will be thriving. “We’re currently working on layers with three or even four different elements to obtain exactly the right properties. Layering such a material, with both uniform thickness and composition, can only be done with ALD.”
Not to mention what could be called the pinnacle of deposition technology: selective deposition. In this technique, materials end up getting deposited in selected areas.
“This is the next big thing. We brought thermal ALD into the world, we brought plasma ALD into the world, and selective ALD is next. With selective ALD, you can deposit on horizontal surfaces and not at all on vertical surfaces, for example. Or on certain materials and not on others. We can achieve this by exploiting differences in local surface chemistry and by applying surface treatments. Material selection is constrained in CMOS fabrication, but we’ve developed a portfolio of surface treatments that will allow us to differentiate local surfaces.”
With selective ALD, ASM will enter even more into ASML’s territory. After all, if you can choose where to deposit materials, you can create structures and thus patterns – bottom-up, and, not like lithography, top-down. “It can save on manufacturing steps, but the biggest advantage is that the alignment of materials is always perfect. With lithography, you’re always slightly off. That’s why we think that selective ALD will increase yield.” Raaijmakers stresses that selective ALD won’t replace lithography completely. “Both techniques are essential.”
Unless it becomes pointless to keep scaling, of course, but Raaijmakers isn’t afraid of that. He’s convinced that, over the next decade, the industry can keep moving forward. And he has a good feeling about the decades after that, too. “Sure, it’s getting more and more complex. Shrinking linear dimensions by a factor of 0.7 every two years is no longer possible. But there are still so many opportunities to integrate more functions per chip area. An industry that’s growing exponentially can afford to turn those opportunities into reality.”