Paul van Gerven
7 June

Like its planar predecessor, the FinFET will become a legacy technology now that the last of the leading-edge semiconductor manufacturers has announced a switch to nanosheet transistors. TSMC stuck with FinFETs in 3nm-class chips, but its next node will feature nanosheets, the foundry told reporters. High-volume production of these 2nm chips is scheduled for 2025.

Imec FinFET to forksheet
As the FinFET makes way for the nanosheet, Imec tips the forksheet for sub-2nm CMOS. Credit: Imec

As the dimensions of transistors shrink, the proximity between the drain and the source lessens the gate electrode’s ability to control the flow of current in the channel. That’s why leading-edge chipmakers in the early 2010s moved to the FinFET architecture, in which the channel is raised to a 3D fin structure with a gate draped over it on three sides. Nanosheets take this strategy one step further and have the gate envelop the channel completely, which is why nanosheet technology is called gate-all-around (GAA) technology.

Samsung will commence high-volume manufacturing of 3nm GAA chips soon. Intel, too, plans to start its GAA implementation before TSMC. The “20A” (20-angstrom) node is slated for 2024.