Paul van Gerven
16 July 2020

As IC packaging becomes increasingly complex and integral to the success of the overall semiconductor design process, front-end engineers need to cooperate ever more closely with their back-end colleagues. CITC and the HAN University of Applied Sciences set up a packaging course to help them out.

Catering to growing demand in the semiconductor industry, Chip Integration Technology Center (CITC), together with the HAN University of Applied Sciences, is launching a course in semiconductor packaging. Completing the 5 month, fully certified Semiconductor Packaging University program will make graduates more effective at dealing with the increasingly complex interplay between the front and back-end technology that ultimately determines the performance of a semiconductor product.

“It is important to semiconductor companies and their suppliers that their engineers, even if they are not directly involved with packaging and integration, are familiar with the issues and constraints associated with these technologies,” explains Joop Bruines, who is involved in setting up the course at CITC and currently oversees the program at the HAN. “Front and back-end engineering aren’t exactly separate worlds these days, but the interface between them can definitely be improved. That is exactly what this course intends to achieve from the packaging perspective.”


“The need for a semiconductor packaging course came up at quite an early stage while setting up CITC, talking to our founding customers Ampleon, Nexperia and NXP,” confirms CITC director Barry Peet. “It’s a natural consequence of packaging and integration technology, which is gaining importance in the overall semiconductor design process. There may have been a time when you could design a chip and simply hand it over for packaging and assembly. However, these days it’s much more an integrated process, with packages becoming more complex and customer-specific. Companies have to change with the times, hence their need for a course that allows front-end engineers to familiarize themselves with back-end complexity.”

Bruines adds: “Naturally, companies tried to address this issue internally, but those efforts typically remained fragmented: different packaging departments would organize their own seminars or workshops. Clearly, an integral approach is more effective and efficient. Additionally, since we’re dealing with an industry-wide trend, it makes sense to set up an all-in-one training that is accessible to everyone. CITC’s partners see a lot of value in that.”

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Following a basic introduction into the subject, the course sweeps across the packaging world, covering application areas and their associated requirements, advanced packaging and interconnect techniques, simulation and testing procedures, as well as quality and reliability practices. Sub-topics are taught by experts, which are kindly provided by CITC’s customers and partner institutes. The course features a practical assignment, in which participants, supervised by professionals, work in teams to design a prototype semiconductor package and demonstrate its feasibility.

“We greatly value in-person interaction in this course. Knowledge transfer is clearly its main purpose, but participation also offers networking opportunities. You get to be in the same room with experts that are otherwise not easily accessible,” says Peet. “We obviously have to deal with social distancing restrictions, but we can meet these requirements. Part of the course may be taught online, as many courses are these days, but we are convinced that we can safely organize physical meetings for the course elements that call for in-person interaction and hands-on activities.”

The first edition of the Semiconductor Packaging University Program is set to start in September. CITC and HAN are still accepting applications.